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![Appendix A: Logic Gates and Boolean Algebra Used in the Book - FSM-based Digital Design using Verilog HDL [Book]](https://www.oreilly.com/api/v2/epubs/9780470060704/files/images/appa-f001.jpg "Appendix A: Logic Gates and Boolean Algebra Used in the Book - FSM-based Digital Design using Verilog HDL [Book]")
Appendix A: Logic Gates and Boolean Algebra Used in the Book - FSM-based Digital Design using Verilog HDL [Book]
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